Several different test results of PCB maintenance steps
The main limiting factor of the PCB online function test system is that the driver's reverse absorption capacity/discharge current is too large, thus covering the fault phenomenon of the chip input pin under test For example, the input pin impact of most chips is very high (greater than 1 megaohm) If the internal function of the input pin is damaged, the pin impedance can be reduced to about 20 ohms, whICh will cause the chip driving the input pin to fan out. The circuit fault is that most chips can only drive about 10 mA output current However, the universal reverse drive tester can drive an input pin with an impedance of 20 ohms, which enables a chip with a faulty input pin to pass a functional test QT200 can drive nodes above 8 ohms (less than 8 ohms are regulated as short circuits), which is the main problem of this system
Reasons for PCB test failure:
Chip function damage
Speed/timing issues
Chip pin status (floating, high impedance,
Clock, illegal connection)
OC door row or status
Fan out problem
Classification of ICFT test results
Test passed
Test faiLED
The equipment has not been fully tested
Same equipment
Equipment is different
(2) How to deal with different PCB test results
Circuit board

When the "Test Failed" result appears
Check whether the test fixture is connected to the wrong chip and whether it is well connected to the test chip. Check whether there is an open pin (HIZ is displayed) in the pin status window and whether the power supply pin is detected. Correct these problems and retest.
If the result is still "Test Failed", move the mouse to the pin status window, and then press the left button to display the pin impedance. Compare the pin impedance with error with another pin impedance with the same function. If a test error occurs on one of the output pins of the chip, please check whether the impedance of this pin is consistent with that of other output pins (note that the impedance at this time is the grounding impedance measured when the chip is powered on).
If the impedance compared is approximately equal, reduce the test time base or threshold, and then test again. If this test passes, it means that the chip test error is a timing problem. This may be an output pin connected to a capacitive device. The state of the output pin slows down due to the discharge process of the capacitor. If the test after adjusting the time base or threshold can pass, you can 90% confirm that the device is not damaged, and then you can test the next chip.
If the test still fails after adjusting the time base or threshold, check whether isolation is required. If isolation is not required, go directly to step 5.
If it can be seen from the fixture status that the reason for the test failure is that the output pin cannot reach the normal logic level, reduce the test threshold and test again. If the test with loose threshold can be passed at this time, it means that the load connected to the chip is too heavy, or the output driving ability of the chip itself has deteriorated, and the current required for normal load can not be absorbed or discharged. When this happens, the user must pay special attention. The solution is to retest the impedance of the output pin to the ground when the test board is powered on or not. You can also use the QSM/VI method on the test board. Test the VI curve of each output pin of the chip under power on and power off conditions.
Compare the measured impedance of each output pin to ground. If the impedance measured without power supply is approximately the same, and when the power supply is turned on, the impedance of the output pin with test error is higher than the impedance of other output pins, it indicates that the chip function is damaged (the high impedance state cannot absorb or discharge the required current), and the chip should be replaced.
Comparing the VI curve of each output pin, if the impedance of one output pin is significantly lower than that of other output pins, it means that the problem is the fan out load connected to this pin. Detect the impedance of all chip input pins connected to this pin, and find out the real short circuit point.
In order to further find out the root cause of the problem, use flat nose pliers to clamp the output pin on the test chip with test error, and then retest. If the test passes at this time, it indicates that there is a problem with the load connected to the chip.
2 When the result of "equipment not fully tested" appears
When the output pin of the chip under test is not turned over during the test (that is, the fixed high or low potential is maintained in the test window), the system will prompt "the device is not completely tested" (the waveform window on the screen will not appear when the prompt appears) to MARK any test error. For example, the input pin of the 7400 inverter gate is short circuited to the ground, and the corresponding output pin is always high level. The above prompt will appear when testing the chip.
If the user has the PCB schematic diagram of the board under test, he can easily determine whether the pin connection state of the chip is normal.
If the user has learned a good circuit board, the normal connection state of the learning chip will also be recorded. When testing bad boards, the system will automatically compare the learning results with good boards. If the comparison results are different, it means that the bad boards have illegal connections; If the comparison results are the same, you can ignore the "device not fully tested" prompt and continue to test the next chip.
If the chip under test is an OC device and is designed as a PCB circuit, the output of the chip may be affected by other chips related to it For example, if the input logic of a chip causes its output to be fixed at low level, the output of the test chip will also be fixed at low level At this time, the test chip system will also prompt "the equipment is not completely tested" Users of such equipment should pay special attention It is recommended to use QSM/VI method to judge PCB fault points by comparing VI curves of all pins with the same function on the test chip

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